1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device. The invention particularly relates to a semiconductor device which has a higher withstand voltage and in which the reverse recovery current is reduced, and a method of manufacturing such a semiconductor device.
2. Description of the Background Art
A semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) is applied to various inverter circuits as a switching element. In order to release the energy stored in an inductive load in the switching process and utilize it as the circulating current, a diode is connected in antiparallel with a main semiconductor device. Such a diode is especially referred to as a flywheel diode.
Excess carriers are stored in a diode in the forward bias state, that is, in the ON state. The stored excess carriers are released in the process of transition to the OFF state, that is, the reverse bias state. At this time, current flows in a direction opposite to the forward direction of the diode. This current is especially referred to as reverse recovery current which flows into a semiconductor device such as the IGBT, resulting in the loss. The excess carriers which constitute the reverse recovery current are, in this case, minority carriers or holes.
A diode in which the minority carriers are not stored is the Schottky diode. Description of the Schottky diode is given below referring to the figure. With reference to FIG. 54, at one surface of an nxe2x88x92 substrate 101, a silicon oxide film 107 is formed. An anode metallic electrode 105 is further formed via a Schottky junction region 104. At the other surface of nxe2x88x92 substrate 101, a cathode metallic electrode 106 is formed via an n+ cathode region 102.
In this structure, most current flowing through Schottky junction region 104 is constituted by the majority carriers. Therefore, no minority carrier is stored in nxe2x88x92 substrate 101, and the reverse recovery current is small. As a result, a high speed switching is possible. However, the withstand voltage in the reverse bias state depends on Schottky junction region 104. The withstand voltage is about 100V at most, and improvement of the withstand voltage is impossible.
In order to improve the withstand voltage, a structure has been used in which a pn junction is provided around the Schottky junction region, a depletion layer extending from the pn junction in the reverse bias state is utilized, and the withstand voltage is obtained. A first conventional diode having such a structure is described referring to the figure. With reference to FIG. 55, a plurality of p anode regions 103 are formed at one surface of nxe2x88x92 substrate 101. On the one surface of nxe2x88x92 substrate 101 including p anode regions 103, an anode metallic electrode 105 is formed. Schottky junction region 104 is formed between anode metallic electrode 105 and n substrate 101. On the other surface of nxe2x88x92 substrate 101, a cathode metallic electrode 106 is formed via n+ cathode region 102.
In this diode, a depletion layer extends from an interface between p anode regions 103 and nxe2x88x92 substrate 101 toward the nxe2x88x92 substrate particularly in the reverse bias state. In the vicinity of Schottky junction region 104, the depletion layers extending from the interfaces between the adjacent p anode regions 103 and nxe2x88x92 substrate 101 connect with each other, easing the electric field. As a result, the withstand voltage in the reverse bias state is improved compared with the Schottky diode.
A second conventional diode is described referring to the figure. With reference to FIG. 56, a plurality of p anode regions 103 are formed at one surface of nxe2x88x92 substrate 101. At regions between respective p anode regions 103, a pxe2x88x92 region 108 is formed. On p anode regions 103 and pxe2x88x92 region 108, anode metallic electrode 105 is provided. On the other surface of the nxe2x88x92 substrate, cathode metallic electrode 106 is formed via n+ cathode region 102.
In this diode, a depletion layer extends from an interface between p anode region 103 and nxe2x88x92 substrate 101 toward nxe2x88x92 substrate 101, and a depletion layer further extends from an interface between pxe2x88x92 region 108 and nxe2x88x92 substrate 101 toward nxe2x88x92 substrate 101, particularly in the reverse bias state. As a result, the withstand voltage is further improved compared with the diode shown in FIG. 55.
A third conventional diode disclosed in Japanese Patent Laying-Open No. 4-321274 is described referring to the figure. With reference to FIG. 57, a plurality of concave portions 206 are formed at one surface of a semiconductor substrate of one conductivity type 201. A semiconductor region of opposite conductivity type 204 is formed along an inner surface of each concave portion 206. A one electrode metal 205 is formed on one conductivity type semiconductor substrate 201 including the surface of concave portion 206. On the opposite side of one conductivity type semiconductor substrate 201, an ohmic electrode metal 203 is formed via a one conductivity type semiconductor 202 of low resistance. One conductivity type semiconductor substrate 201 and one electrode metal 205 constitute the Schottky barrier junction.
In this diode, a depletion layer extends from an interface between semiconductor region of opposite conductivity type 204 and semiconductor substrate of one conductivity type 201 toward one conductivity type semiconductor substrate 201 in the reverse bias state. At this time, the portion adjacent to the interface between one conductivity type semiconductor substrate 201 and one electrode metal 205 is sandwiched between the depletion layers. Accordingly, in a portion adjacent to one conductivity type semiconductor substrate 201 and one electrode metal 205, the electric field is eased and the withstand voltage is improved.
Next a fourth conventional diode disclosed in U.S. Pat. No. 4,982,260 is described. Referring to FIG. 58, on one surface of a first semiconductor substrate layer 502, a second semiconductor layer 506 is formed. At a main surface 508 of the second semiconductor layer 506, a plurality of trenches 512A-12F are formed. P+ regions 510A-10D as well as mesa regions 514A-14C are alternately provided between adjacent trenches. The depth of p+ regions 510A-10D is substantially identical to that of trenches 512A-12F. Oxide layers 522A-22F are respectively formed at respective inner surfaces of trenches 512A-12F. A metallic anode 518 is formed on main surface 508 of the second semiconductor layer 506. Schottky barrier regions 550A-50C are formed between metallic anode 518 and the second semiconductor layer 506. A cathode 504 is formed on the other surface of the first semiconductor substrate layer 502.
In this diode, a depletion layer extends from an interface between p+ regions 510A-10D and the second semiconductor layer 506 toward the second semiconductor layer 506 in the reverse bias state. The depletion layer extending from each interface is connected with adjacent depletion layers, and the withstand voltage of the diode is improved.
Another diode disclosed in U.S. Pat. No. 4,982,260 is described as a fifth conventional art using the figure. With reference to FIG. 59, on one surface of a first semiconductor substrate layer 702, a second semiconductor layer 706 is formed. A plurality of trenches 710A-710F are provided at a main surface of second semiconductor layer 706. At the bottoms of respective trenches 710A-710F, p+ regions 720A-720F are provided. Respective trenches 710A-710F have their side surfaces at which oxide layers 722A-722J are formed. On the main surface of the semiconductor layer 706, a metallic anode 716 is formed. On the other surface of the first semiconductor substrate layer 702, a cathode 704 is formed.
In this diode, a depletion layer extends from an interface between p+ regions 720A-720F and the second semiconductor layer 706 toward the second semiconductor layer 706. Each depletion layer is connected to adjacent depletion layers, and extends to still deeper region in the second semiconductor layer 706. As a result, the withstand voltage of the diode is further improved.
Problems of those conventional diodes described above are as follows.
In the diode shown in FIG. 55 presented as the first conventional art, holes as minority carriers are injected from p anode region 103 toward nxe2x88x92 substrate 101 in the forward bias state. At this time, p anode region 103 includes a relatively large number of impurities, so that still more holes are injected into nxe2x88x92 substrate 101 and stored therein. Therefore, the reverse recovery current increases in the process of transition from the forward bias state to the zero bias state.
In the diode shown in FIG. 56 presented as the second conventional art, p anode region 103 has a relatively high concentration, so that still more holes are injected from p anode region 103 into nxe2x88x92 substrate 101 in the forward bias state. As a result, the reverse recovery current increases.
When the potential between the metallic anode 716 and cathode 704 in the reverse bias state becomes higher, a depletion layer extends from an interface between pxe2x88x92 region 108 and nxe2x88x92 substrate 101 toward nxe2x88x92 substrate 101, and the depletion layer further extends toward pxe2x88x92 region 108. If the edge of the depletion layer has contact with anode metallic electrode 105, the dielectric breakdown could occur.
In the diode shown in FIG. 57 as the third conventional art, after concave portion 206 is formed at one conductivity type semiconductor substrate 201, opposite conductivity type semiconductor region 204 is formed along the inner surface of concave portion 206. Therefore, the concentration of impurities is relatively high in the entire semiconductor region of opposite conductivity type 204. As a result, still more holes are injected from opposite conductivity type semiconductor region 204 into one conductivity type semiconductor substrate 201 in the forward bias state. As a result, the reverse recovery current increases.
In the diode shown in FIG. 58 as the fourth conventional art, the concentration of impurities in the formed p+ regions 510A-10D is relatively high. Still more holes are injected from the p+ regions into the second semiconductor layer in the forward bias state. As a result, the reverse recovery current increases.
In the diode shown in FIG. 59 as the fifth conventional art, the concentration of impurities in the formed p+ regions 720A-720F is relatively high, and the reverse recovery current also increases.
The invention is made to solve the problems above. One object of the present invention is to provide a semiconductor device which has an improved withstand voltage and in which the reverse recovery current is reduced. Another object of the present invention is to provide a method of manufacturing such a semiconductor device.
A semiconductor device according to a first aspect of the invention includes a semiconductor substrate of a first conductivity type, a plurality of trench portions, a plurality of impurity regions of a second conductivity type, and a first electrode layer. The plurality of trench portions are selectively formed at a first main surface of the semiconductor substrate. The plurality of impurity regions of the second conductivity type are in contact with at least bottom surfaces of respective trench portions and are formed deeper than respective trench portions. The first electrode layer is formed on the first main surface of the semiconductor substrate. The first electrode layer and a region of the first conductivity type of the semiconductor substrate constitute a Schottky junction at the first main surface. The first electrode layer is in ohmic contact with the impurity region at a prescribed junction surface. Each impurity region has a minimum impurity concentration which enables the ohmic contact with the first electrode layer at a portion near the prescribed junction surface, and has an impurity concentration still lower than the minimum impurity concentration which enables the ohmic contact at a portion other than the portion near the prescribed junction surface.
In this structure, minority carriers are injected from the impurity region in ohmic contact with the first electrode layer into the semiconductor substrate in the forward bias state in which one prescribed potential is applied to the first electrode layer and the semiconductor substrate respectively. An amount of injected minority carriers depends on an impurity concentration in the impurity region. In this case, the impurity region has a minimum impurity concentration which enables the ohmic contact with the first electrode layer at a portion adjacent to a prescribed junction surface, and has an impurity concentration still lower than the minimum impurity region at the other portion. Accordingly, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein is reduced. As a result, the reverse recovery current flowing into the semiconductor device in a reverse bias direction in the process of transition from the forward bias state to the reverse bias state.
A depletion layer extends from an interface between the impurity region and the semiconductor substrate toward the semiconductor substrate in the reverse bias state in which another prescribed potential is applied to the first electrode layer and the semiconductor substrate respectively. At this time, at a region adjacent to the Schottky junction, the electric field is eased since depletion layers extending from adjacent impurity regions are connected with each other. The depletion layer extends deeper in the semiconductor substrate since each impurity region is formed deeper than the trench portion. Therefore, the distance from the first electrode layer to the edge of the depletion layer increases. The withstand voltage of a semiconductor substrate in the reverse bias state is thus improved.
Preferably, each impurity region is formed to be in contact with both sides of the trench portion as well as the first main surface in the vicinity of the both sides. A prescribed junction surface is located at, at least the first main surface of the impurity region.
In this case, each impurity region has a trench portion formed therein, so that the impurity region is substantially located at a portion near the junction with the semiconductor substrate. An impurity concentration of the impurity region formed at the semiconductor substrate gradually decreases from the portion near the center of the first main surface of the impurity region to an interface between the impurity region and the semiconductor substrate. A portion having a relatively high impurity concentration is removed by forming the trench portion in the impurity region. An impurity concentration of a portion remaining substantially as an impurity region is relatively low. Therefore, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein in the forward bias state is further reduced. As a result, the reverse recovery current is further reduced.
Preferably, insulator is embedded in each trench portion.
In this case, the first electrode layer is in ohmic contact with the impurity region only at the first main surface. The area of the ohmic contact between the first electrode layer and the impurity region is reduced. An amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein in the forward bias state is further reduced. As a result, further reduction of the reverse recovery current is achieved.
Still preferably, an insulating layer formed at surfaces of both sides of the trench portion is included. Each impurity region is formed to be in contact with only a portion near a bottom surface of each trench portion, and a prescribed junction surface is located at a bottom surface of each trench portion.
In this case, the impurity region is formed within the semiconductor substrate to be in contact with only a portion near the bottom surface of the trench portion. In other words, the impurity region is formed at a position distant from the first main surface of the semiconductor substrate. A depletion layer extends from an interface between the impurity region and the semiconductor substrate toward the semiconductor substrate to a still deeper position in the reverse bias state. The electric field of a portion near the Schottky junction is further eased. As a result, the withstand voltage of the semiconductor device in the reverse bias state is improved.
A semiconductor device according to the second aspect of the invention includes a semiconductor substrate of a first conductivity type, a plurality of trench portions, a conductor, an impurity region of a second conductivity type, and a first electrode layer. The plurality of trench portions are selectively formed at a first main surface of the semiconductor substrate. The conductor is embedded in each trench portion with a first insulating layer therebetween. The impurity region of the second conductivity type is formed at a region between respective trench portions of the first main surface of the semiconductor substrate, in contact with at least one of the opposite sides of adjacent trench portions, and has a depth deeper than that of the trench portion. The first electrode layer is formed on the first main surface of the semiconductor substrate. The first electrode layer is in ohmic contact with each impurity region at the first main surface. Each impurity region has a minimum impurity concentration which enables ohmic contact with the first electrode layer at a portion near the first main surface, and has an impurity concentration still lower than the minimum impurity region which enables ohmic contact, at a portion other than that near the first main surface.
In this structure, minority carriers are injected from the impurity region in ohmic contact with the first electrode layer into the semiconductor substrate in the forward bias state in which one prescribed potential is applied to the first electrode layer and the semiconductor substrate respectively. An amount of injected minority carriers depends on an impurity concentration of the impurity region. In this case, the impurity region has the minimum impurity concentration which enables ohmic contact with the first electrode layer at the first main surface, and has an impurity concentration still lower than the minimum impurity concentration at the other portion. Accordingly, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein is reduced. As a result, the reverse recovery current flowing into the semiconductor device in the reverse bias direction in the transition from the forward bias state to the reverse bias state is reduced.
A depletion layer extends from an interface between the impurity region and the semiconductor substrate toward the semiconductor substrate in the reverse bias state in which the other prescribed potential is applied to the first electrode layer and the semiconductor substrate respectively. Since the impurity region has its depth larger than that of the trench portion, the depletion layer further extends toward the first main surface at a portion near the region in which the interface and the side of the trench portion are in contact with each other. Accordingly, the depletion layer further extends at a portion adjacent to both sides of the trench portion, and the withstand voltage of the semiconductor device in the reverse bias state is improved.
Preferably, the impurity region is formed to be in contact with the opposite sides of adjacent trench portions, and the first electrode layer and a region of the first conductivity type of the semiconductor substrate form the Schottky junction at the first main surface.
In this case, a region in which the impurity region is formed is reduced. An amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein in the forward bias state is further reduced. As a result, the reverse recovery current flowing in the semiconductor device in the reverse bias direction in transition from the forward bias state to the reverse bias state is reduced.
Preferably, each impurity region is formed at both sides of each trench portion to be in contact with one side of each trench portion. The first electrode layer and a region of the first conductivity type of the semiconductor substrate form the Schottky junction at the first main surface.
In this case, an impurity region formed to be in contact with the side of each trench portion is located in a region sandwiched between respective trench portions. The first conductivity type region of the semiconductor substrate sandwiched between impurity regions and the first electrode layer form the Schottky junction. Therefore, a region in which the impurity region is formed is further reduced. As a result, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein in the forward bias state is further reduced.
A depletion layer extends from an interface between the impurity region located between respective trench portions and the semiconductor substrate toward the semiconductor substrate in the reverse bias state. A depletion layer extending from the portion between respective trench portions is easily connected with an adjacent depletion layer. As a result, the reverse recovery current flowing in the semiconductor device in the reverse bias direction in the transition from the forward bias state to the reverse bias state is reduced. Further, the withstand voltage of the semiconductor device in the reverse bias state is improved.
Preferably, a second insulating layer formed on each conductor which insulates the first electrode layer from each conductor, and an electrode portion electrically connected with each conductor are included.
In this case, voltage of at least a prescribed threshold voltage is applied to the electrode portion. At this time, the conductivity type of the impurity region near the second insulating layer of each trench portion is reversed and a channel region is formed. At the same time that minority carriers are injected from the impurity region toward the semiconductor substrate, carriers of a conductivity type opposite to that of the minority carriers reach the first electrode layer through the channel region. The carriers of the opposite conductivity type which reach the first electrode layer again couple with the minority carriers in the impurity region and disappear. Accordingly, an amount of the minority carriers injected from the impurity region into the semiconductor substrate and stored therein is reduced. Reduction of the reverse recovery current flowing in the semiconductor device in the reverse bias direction in transition from the forward bias state to the reverse bias state is achieved.
Voltage of a prescribed threshold voltage or less is applied in the reverse bias state. The absolute value of the voltage is approximately equivalent to that of the voltage applied in the forward bias state. At this time, a depletion layer extends from an interface between the second insulating layer of each trench portion and the semiconductor substrate toward the semiconductor substrate. A depletion layer further extends from an interface between the impurity region and the semiconductor substrate toward the semiconductor substrate. These depletion layers easily connect with adjacent depletion layers. As a result, the withstand voltage of the semiconductor device in the reverse bias state is improved.
Preferably, the impurity region is formed to be in contact with the opposite sides of adjacent trench portions, and includes a second insulating layer formed on each conductor and insulates the first electrode layer from each conductor, and includes an electrode portion electrically connected with each conductor.
In this case, the impurity region is formed at a region between respective trench portions. In the forward bias state, voltage of at least a prescribed threshold voltage is applied to the electrode portion. At this time, the conductivity type of the impurity region near the second insulating layer of each trench portion is reversed and a channel region is formed. At the same time that minority carriers are injected from the impurity region toward the semiconductor substrate, carriers of a conductivity type opposite to that of the minority carriers reach the first electrode layer again through the channel region. Carriers of the opposite conductivity type which reach the first electrode layer again couple with minority carriers in the impurity region and disappear. As a result, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein is reduced.
Voltage of a prescribed threshold voltage or less is applied in the reverse bias state. At this time, in addition to a depletion layer extending from an interface between the impurity region and the semiconductor substrate toward the semiconductor substrate, a depletion layer extends from an interface between the second insulating layer of each trench portion and the semiconductor substrate toward the semiconductor substrate. As a result, reduction of the reverse recovery current flowing in the semiconductor device in the reverse direction in transition from the forward bias state to the reverse bias state, as well as improvement of the withstand voltage of the semiconductor device in the reverse bias state are achieved.
Preferably, the first electrode layer is formed of aluminum, and the minimum impurity concentration which enables ohmic contact with the first electrode layer is 1xc3x971016xe2x88x921xc3x971017/cm3.
In this case, ohmic contact can be formed easily as desired.
A method of manufacturing a semiconductor device according to the third aspect of the invention includes following steps. Into a first main surface of a semiconductor substrate of a first conductivity type, impurities of a second conductivity type are selectively introduced. A plurality of impurity regions are formed by heat treatment. A Schottky junction portion is formed at the first main surface of a region of the first conductivity type of the semiconductor substrate. A trench portion is formed in each impurity region by the anisotropic etching. A first electrode layer is formed on the first main surface of the semiconductor substrate such that it is in ohmic contact with the impurity region at, at least the first main surface.
This manufacturing method allows an impurity concentration of the impurity region formed at the semiconductor substrate to be gradually reduced from the portion near the center of the semiconductor substrate of the first main surface toward the interface with the semiconductor substrate. By forming the trench portion at the impurity region, a region having a relatively high impurity concentration is removed from the impurity region. Therefore, an impurity region actually formed corresponds to a portion having a relatively low impurity concentration located at a portion near the interface with the semiconductor substrate. The impurity region is in ohmic contact with the first electrode layer at, at least the first main surface. An amount of minority carriers injected from the impurity region into the semiconductor substrate in the forward bias state is thus reduced. A semiconductor device in which the reverse recovery current flowing in the reverse bias direction in transition from the forward bias state to the zero bias state is reduced can be obtained.
The method further includes a step of embedding an insulator in each trench portion.
In this case, the first electrode layer is in ohmic contact with the impurity region only at the first main surface. Accordingly, an area of a portion in which the first electrode layer and the impurity region are in ohmic contact with each other is reduced. Further, an amount of minority carriers injected from the impurity region into the semiconductor substrate and stored therein in the forward bias state is reduced. As a result, a semiconductor device in which the reverse recovery current is further reduced can be obtained.
Preferably, aluminum is used for the first electrode layer, and the impurity region is formed such that it has an impurity concentration of 1xc3x971016xe2x88x921xc3x971017/cm3at a portion near the junction surface with the first electrode layer.
In this case, the impurity region is formed to have a minimum impurity concentration which enables ohmic contact with the first electrode layer.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.